Re: DRC has announced its newest FPGA that drops into AMD's Socket 940
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Re: DRC has announced its newest FPGA that drops into AMD's Socket 940

From: c d saunter <christopher.saunter@durham.ac.uk>
Date: Fri Apr 28 2006 - 22:39:41 CEST

tomstdenis@gmail.com wrote:

: Jan Panteltje wrote:
: > http://www.dailytech.com/article.aspx?newsid=1920

<snip>

: 8x200Mhz only provides 400MB/sec traffic to the CPU so really this is
: useful for tasks which either totally reside on the FPGA side of the
: board or have really high latency (e.g. PK work).

Sitting on the HT bus like that offers residence about as close as you can
get to a mainstream CPU. Given the new HT3 stuff - faster and links
possible over 1 meter - i.e. directly joining blades - I really like this
aproach. Especially given the memory architecture that goes along with
HT/Opterons. It's bringing mainstream CPUs and FPGAs back into the point
to point multiple interconnect world of the TigerSHARCs and the old TI
C40s.

It feels a bit like a resurgence to the old British Transputer except with
gate arrays mixing with CPUs on an equal footing in terms of connectivity.

cds
Received on Mon May 1 02:05:50 2006